1. Field of the Invention
This invention relates to a chip package structure, it more specifically relates to a structure with inward extended leads to replace die pad such that volume reduction can be achieved, heat dissipation can be enhanced, packaging material cost can be saved, and a good and stable electrical connection can be achieved through this package.
2. Description of the Related Art
Common IC chip suffers from the characteristic of weakness, an appropriate outer package has to be added to it to prevent it from damage or contamination by any external source, furthermore, the chip has to be electrically connected to a circuit board or a carrier board or a leadframe such that the chip can communicate with the external.
In the prior art Taiwan patent no. 515069 titled “leadframe structure”, it discloses a carrier structure to hold a chip and to connect the chip electrically to the external, it comprising mainly of: multiple cluster-arranged leads, each lead forms a block shape respectively, the lead further comprising of a top surface and a bottom surface located at the opposite side of the top surface, the top surface is used to accommodate said chip, moreover, at a predetermined position on the bottom surface a dent is formed in a pre-determined depth toward the top surface, the surface of the dent can be electrically connected to the chip, furthermore, the non-dented region is formed naturally at least one connecting part, the connecting part forms a protruding shape relative to the dented part and is used to be electrically connected to the external such that the chip can communicate with the external.
Moreover, another Taiwan patent no. 496578 titled “Semiconductor package structure with a shrunk surface connecting face”, comprising of:
A chip, comprising of an upper surface and a lower surface, multiple bonding pads are formed on the upper surface of the chip;
Multiple leads comprising of an upper surface and a lower surface, the leads extending to the lower surface of the chip to carry the chip;
Multiple metallic bonding pads, and the bonding pads of the chip are electrically connected to the upper surface located at the outer end of leads;
An encapsulated body which encloses the chip, metallic bonding wires and the upper surface of the leads, the encapsulated body at least exposes part of the lower surfaces of the multiple leads; and
Wherein the exposed lower surface of the leads on the encapsulated body is located at a relative inner end of the leads upper surface, which is used to be electrically connected to the metallic bonding wires.
Although the above-mentioned two prior art structures can correct the drawbacks in conventional chip package, the changes and corrections made are merely on the shape of leadframe leads and the leads lower surface, package volume can still not be lowered and the heat dissipation can not be enhanced or the goals of package material saving can not be reached, moreover, in the prior art packages, good and stable electrical connection of the package is difficult to be reached, therefore, the chips can not be widely used in the printed circuit boards; and the above-mentioned prior art package structures can not fit the demands in practical use.